In-network acceleration for AI / ML workloads
Guest Post: How programmable switches can handle collective offloading seamlessly. Challenges and future trends.
GPU fabrics for GenAI workloads
Guest Post: Exploring the intricacies of intra and inter-GPU server traffic patterns, network topologies for large clusters, the latest methods for handling network congestion, and more.
Chiplets — the inevitable transition
Guest Post: How chiplets have become a viable alternative to monolithic dies, impacting Moore’s Law, and the CPU/GPU and networking sectors.
Large Language Models — the hardware connection
Guest Post: The role of networking when scaling LLM architecture’s gigantic models.
Optimizing power consumption in high-end routers
Guest Post: The power consumption of high-end routers is a hot topic. Who’s to blame for all this heat?
Sizing router buffers — small is the new big…
Guest Post: Small buffers could result in excessive packet loss and underutilized output links. How are high-end routing ASICs addressing this challenge?
Longest prefix matching in networking chips
Guest Post: The basic concepts of LPM and popular approaches for implementing in silicon.